Discretix HASH Cryptographic Engines (DxHASH)

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	Discretix HASH Cryptographic Engines (DxHASH)

Discretix Cryptographic Engines

Discretix cryptographic engines are widely deployed in leading system-on-chip solutions. Discretix provides high-quality, ready-to-use cryptographic engines, to support variety of applications. Included in Discretix’s family of cryptographic engines are symmetric ciphers, asymmetric ciphers, Hash and random number generators.

DxHASH - General Description

The DxHASH cryptographic engines fully support the combinations of the MD5 algorithm and Secure Hash Algorithm (SHA), including SHA-1, SHA-256 and SHA-512. The HASH engines generate a digest for data streams and objects. The HASH engine has two main interfaces for data and configuration. Data is provided through a valid 32-bit input signal and a valid bytes signal. The configuration interface allows the CPU to configure the desired mode, load and offload contexts and read the digest computed by the core. The DxHASH engines are highly configurable to address a wide range of applications.

HASH Block Diagram

Click to view full size diagram

Key Applications

	Digital Right Management schemes (OMA DRM, PlayReady)
	WLAN applications (IEEE 802.11)
	IPSec and SSL
	WiMax applications (IEEE 802.16)
	E-commerce (EMV 4.1)
	Storage – SAN/NAS applications (IEEE P1619)
	Transient storage devices (IEEE 1667)

Benefits

	Silicon proven – deployed in numerous devices and platforms
	Vast experience with multiple tier-1 customers
	Mature technology from the embedded security market leader
	Fast time to market, easily integrated
	Highly optimized implementation ensures minimal gate count and reduced power consumption
	Excellent technical support

Certifications

	FIPS ready
	Common Criteria EAL4+ ready

Deliverables

	Synthesizable Verilog RTL source code
	Synthesis script and constraints
	RTL Test Bench (test vectors and expected results)
	User Manual with hardware integration guidelines and application notes

HASH Configuration Options

The DxHASH engine is available in various configurations supporting a wide range of throughput requirements and desired gate count. HMAC versions are available for all configurations.

Name¹	Configuration²	Maximum Throughput (in Mbps)	Maximum Clock Frequency	Gate³ Count
DxHASH-01	MD-5 SHA-1	1430 1144	190MHz	17K
DxHASH-02	MD-5 SHA-1	1648 1379	132MHz	24K
DxHASH-03	MD-5 SHA-1 SHA-256	1430 1144 1341	190MHz	24K
DxHASH-04	MD-5 SHA-1 SHA-256	1648 1379 1648	132MHz	41K
DxHASH-05	SHA-1 SHA-256	1144 1341	190MHz	19K
DxHASH-06	SHA-1 SHA-256	1379 1648	132MHz	28K
DxHASH-07	SHA-1 SHA-256 SHA-512	1083 1270 2094	180MHz	40K
DxHASH-08	SHA-1 SHA-256 SHA-512	1316 1573 2633	126MHz	72K
DxHASH-09	MD-5 SHA-1 SHA-256 SHA-512	1354 1083 1270 2094	180MHz	47K
DxHASH-10	MD-5 SHA-1 SHA-256 SHA-512	1573 1316 1573 2633	126MHz	80K

Optional support for HMAC in all configurations
In configurations where SHA-256 mode is supported, SHA-224 is supported as well In configurations where SHA-512 mode is supported, SHA-384 is supported as well
Technology and synthesis dependent; based on the use of design compiler and slow speed 0.09 ?m TSMC technology; measured at 100MHz

Key Features

Throughput up to 2633 Mbps
Supports MD5, SHA-1, SHA-224, SHA-256, SHA-384 and SHA-512 modes
Support for multiple contexts
Automatic input padding

FIPS PUB 180-1 and FIPS PUB 180-2 compliant
RFC 1321 compliant
Optional support for HMAC in all configurations
Optional support for AMBA AHB data interface

	Download DxHASH Overview (PDF)

Integrated Security Platforms

Content Protection

Middleware & Toolkits